Double Feedback LFSR Parallel Output Generation

Abstract

LFSR shift registers provide the mechanism that allows generating PRN (pseudo-random numbers) sequences. LFSR consists of sequentially connected memory cells where each cell can apply one of the two values 0 or 1. These cells are often called flipflops. In each step, the value from the last flipflop is passed to the next one. The first flip-flop in register applies LFSR's feedback value. The feedback value is the modulo addition of current values from specified flipflops in position. The output code of LFSR is a sequence of ones and zeros. Mostly these outputs or PRN sequences are used for signal modulation in CDMA. For example, in GPS, the broadcasting signal from satellites is modulated with unique PRN numbers for each satellite to allow receivers to identify data with broad-casting satellite numbers. The identification process is performed based on the correlation between locally generated PRN numbers and received signals from satellites. The pick of correlation value means that the signal is identified. Also, the LFSR’s are using in cryptography, and the encryption and decryption time depends on LFSR’s output generation time. The parallel generation method will short this time. The PRN code generation is a sequential process, making it parallel will short the overall signal identification and correlation time for CDMA usage and the encryption and decryption time in cryptography . This article as a unit of discussion will be two feedback based on LFSR’s parallel output generation, and the definition of generic formula that will allow us to define upcoming states of double feedback LFSR without sequential processing.